1. Technical Field
Exemplary embodiments of the present invention relate to a non-volatile memory device, a method of manufacturing the non-volatile memory device, and a method of operating the non-volatile memory device. More particularly, exemplary embodiments of the present invention relate to a non-volatile memory device including a memory transistor and a select transistor in a unit cell, a method of manufacturing the non-volatile memory device and a method of operating the non-volatile memory device.
2. Discussion of Related Art
Electrically erasable programmable read-only memory (EEPROM) devices, which are a type of non-volatile memory device, are used in various fields because the EEPROM devices can electrically store and erase data and preserve data without being provided with power.
In an EEPROM device, electrons pass through a thin insulation layer, that is, a tunnel oxide layer, such as a silicon oxide layer, using Fowler-Nordheim (F-N) tunneling, so that electric charges may be stored in a floating gate in the EEPROM device. The on or off state of a transistor in the EEPROM device depends on the amount of the stored electric charges. A floating gate tunnel oxide (FLOTOX) type device, which is a type of EEPROM device, has a unit cell including a select transistor for selecting a cell and a memory transistor for storing data.
The sizes of unit cells in the EEPROM device are required to be reduced as the memory capacity of the EEPROM device increases. The properties of the unit cells, however, may become poor as the sizes of the unit cells in the EEPROM device are reduced.
When the sizes of the unit cells of the EEPROM device are reduced, the channel length of a memory transistor included in the EEPROM device may also be reduced. The memory transistor may have a threshold voltage that is poorly distributed in on-state and off-state operations as the channel length is reduced.
Depletion layers between a drain region and a source region of the memory transistor make contact with each other as a result of the reduction of the channel length, thereby forming a parasitic depletion capacitor under a tunnel oxide layer. As a result, a voltage drop may occur during the programming or erasing of data. When the memory transistor has the poorly distributed threshold voltage, a programming/erasing window margin may be decreased, so that accurately distinguishing data stored in a unit cell may be difficult.
Additionally, electrons may be trapped in the tunnel oxide layer of the memory transistor when data is repeatedly programmed or erased in the unit cell of the EEPROM device. When the electrons are trapped, the threshold voltage of the memory transistor is increased in an on-state, so that an on-current may be decreased. When the on-current is decreased, the decreased on-current may not be detected by a sense amplifier in a reading operation, so that the memory transistor may not accurately distinguish data.